1. Field of the Invention
The invention relates to a printed circuit board (PCB), and more particularly, to bonding pad(s) for a printed circuit board for a semiconductor package and a method for forming bonding pad(s).
2. Background of the Related Art
In general, as multi-functional electronic devices increase in capacity and become more compact in size, semiconductor packets mounted in the electronic devices must become smaller. Accordingly, a semiconductor package in a ball grid array (BGA) form has been developed which is utilized by attaching solder balls at an upper surface of the printed circuit board of the semiconductor package, in place of outer leads emanating from a semiconductor package. This type of conventional semiconductor package will now be described with reference to FIG. 1.
FIG. 1 is a schematic plan view of a printed circuit board used for fabrication of a semiconductor package in a BGA form in accordance with a conventional art. As shown in FIG. 1, an assembly of a printed circuit board (PCB) 1 includes a cavity 2 formed at the center of the PCB 1 to accommodate a semiconductor chip (not shown) thereon, bonding pads 3 formed at an outer side of the cavity 2 and connected to the semiconductor chip by, for example, gold wire (not shown), and a plurality of external terminal lands (that is, ball bump lands in this case) 4 formed at an exterior of the bonding pads 3 and connected to a circuit pattern (not shown) formed inside the PCB 1.
In assembling the semiconductor package, the semiconductor chip is inserted and attached into the cavity 2 formed at the center of the PCB 1. The attached semiconductor chip and the bonding pads 3 are connected by the gold wire (not shown), whereby the semiconductor chip and the PCB 1 are electrically connected. Thereafter, in order to protect the semiconductor chip, the semiconductor chip and the wire are molded using an epoxy compound.
The bonding pads 3 will now be described with reference to FIG. 2.
FIG. 2 is an enlarged schematic view of bonding pads in accordance with the conventional art. As shown in FIG. 2, the bonding pads 3 are exposed externally, and a photo solder resist (PSR) 6 is applied on the circuit patterns 5 connected to the bonding pads 3. The PSR 6 is applied to protect the circuit pattern 5.
The bonding pads 3 will now be described in detail with reference to FIG. 3.
FIG. 3 is a schematic sectional view taken along line A-Axe2x80x2 of FIG. 2. As shown in FIG. 3, the bonding pad 3 includes an insulation layer 7 applied at an upper surface of the PCB 1, a copper pattern 8 formed at an upper surface of the insulation layer 7, and a nickel plating layer 9 and a gold plating layer 10 sequentially formed on the upper surface of the copper pattern 8.
The copper pattern 8 is formed by removing an unnecessary portion of copper clad laminate (CCL). The CCL is formed by attaching copper foil at one or both sides of the PCB 1 with the insulation layer 7 formed therein and using a general etching process, which will now be described in detail.
First, the copper foil is attached at an upper surface of the insulation layer 7 by using an adhesive 12. In order to increase the strength of the adhesive, the surface of the insulation layer 7 is made rough. A concave-convex portion 11 is formed at a lower surface of the copper foil. In order to increase attachment strength, a chromium (Cr) film 13 is applied on the surface of the concave-convex portion 11. The copper foil is then attached on the upper surface of the insulation layer 7 using the adhesive 12.
Thereafter, the nickel plating layer 9 and the gold plating layer 10 are sequentially formed on the upper surface of the copper pattern 8, thereby completing the bonding pad 3.
However, in removing the copper foil using the etching process to form the bonding pad 3 according to the conventional art, the chrome component remains at the left and right lower portions of the copper pattern 8. That is, the remaining chrome component protrudes from the left and right lower portions of the copper pattern 8. When the nickel plating layer 9 and the gold plating layer 10 are sequentially formed on the copper pattern 8, the nickel plating layer 9 and the gold plating layer 10 are formed so that they cover the outer side of the copper pattern 8 on the upper surface and at both side faces of the copper pattern 8.
However, the nickel plating layer 9 and the gold plating layer 10 are also sequentially formed on the surface of the chromium, which protrudes at the base of the bonding pad 3 as indicated by xe2x80x98Lxe2x80x99 in FIG. 3.
Thus, since the nickel plating layer 9 and the gold plating layer 10 are formed protruded at both the left and right lower portions of the copper pattern 8, the space between adjacent bonding pads 3 becomes narrow, so that there is a limitation to accomplishing a fine pitch of the bonding pad 3.
For example, since the plating layers 9 and 10 are not formed protruded at the upper left and right portion of the copper pattern 8, the pitch interval between the adjacent wire bonding pads can be reduced. But when it comes to the lower portion of the copper pattern 8, since the distance between the left and right lower portions of the adjacent copper patterns 8 is narrower than the distance between the left and right upper portions of the copper patterns 8, it is not possible to reduce the interval between adjacent bonding pads.
As described above, the bonding pad of the PCB for a semiconductor package in accordance with the conventional art has the problem that, as the nickel plating layer 9 and the gold plating layer 10 are formed on the surface of the remaining chrome that protrudes from the left and right lower sides of the copper pattern 8 formed inside the bonding pad, it is not possible to reduce the interval between adjacent bonding pads.
An object of the invention is to substantially solve at least one or more of the above problems and/or disadvantages in whole or in part and to provide at least the advantages described herein.
Another object of the invention is to provide bonding pad(s) for a printed circuit board (PCB) and a method of forming bonding pad(s) capable of reducing the interval between wire bonding pads by preventing a nickel plating layer and a gold plating layer from protruding at the lower portion of a copper pattern when they are formed on the copper pattern.
To achieve at least these and other advantages of the invention, in whole or in part, and in accordance with the purpose of the invention, as embodied and broadly described herein, there is provided bonding pad(s) according to an embodiment of the invention formed on a printed circuit board with circuit patterns. The bonding pads include a plurality of copper patterns formed on the PCB and electrically connected to the circuit patterns, a filler filled at a space between the copper patterns such that an upper surface of the copper pattern is exposed, and a plating layer applied at an upper surface of the copper patterns.
To further achieve at least these and other advantages of the invention, in whole or in part, and in accordance with the purpose of the invention, as embodied and broadly described herein, there is also provided a method according to an embodiment of the invention for forming bonding pad(s) on a PCB, with a plurality of circuit patterns. The method includes forming a plurality of copper patterns electrically connected with the circuit patterns on the PCB, filling the space between the copper patterns with a filler such that upper surfaces of the copper patterns are exposed, and applying a plating layer on the upper surface of the copper patterns.
To further achieve at least these and other advantages of the invention, in whole or in part, and in accordance with the purpose of the invention, as embodied and broadly described herein, there is also provided a plurality of bonding pads formed on a printed circuit board (PCB), including a substrate having circuit patterns formed thereon, including a plurality of copper patterns formed on the substrate and electrically connected to the circuit patterns, a filler filled in spaces between the copper patterns such that upper surfaces of the copper patterns are exposed, and a plating layer applied to upper surfaces of the copper patterns.
To further achieve at least these and other advantages of the invention, in whole or in part, and in accordance with the purpose of the invention, as embodied and broadly described herein, there is also provided a method for forming a plurality of bonding pads on a printed circuit board (PCB) having a plurality of circuit patterns, the method including forming a plurality of copper patterns on a substrate, the copper patterns being electrically connected with the circuit patterns on the PCB, filling a filler at spaces between the copper patterns such that upper surfaces of the copper patterns are exposed, and applying a plating layer to upper surfaces of the copper patterns.
To further achieve at least these and other advantages of the invention, in whole or in part, and in accordance with the purpose of the invention, as embodied and broadly described herein, there is also provided a method for forming a plurality of bonding pads on a printed circuit board (PCB) having a plurality of circuit patterns, the method including forming a plurality of copper patterns on a substrate, the copper patterns being electrically connected with the circuit patterns on the PCB, filling a filler at spaces between the copper patterns such that upper surfaces of the copper patterns are exposed, plating a nickel plating layer on the exposed upper surfaces of the copper patterns, and plating a gold plating layer on the nickel plating layer, wherein widths of the nickel plating layer and the gold plating layer are smaller than a width of the copper patterns.
To further achieve at least these and other advantages of the invention, in whole or in part, and in accordance with the purpose of the invention, as embodied and broadly described herein, there is also provided a bonding pad formed on a printed circuit board (PCB), including a substrate having at least one circuit pattern formed thereon, including at least one copper pattern formed on the substrate and electrically connected to at least one circuit pattern, filler filled in on either side of at least one copper pattern up to a height substantially level with an upper surface of the copper pattern such that the upper surface of the copper pattern is exposed, and a plating layer applied at the upper surface of the at least one copper pattern.
To further achieve at least these and other advantages of the invention, in whole or in part, and in accordance with the purpose of the invention, as embodied and broadly described herein, there is also provided a method for forming a bonding pad on a printed circuit board (PCB) having at least one circuit pattern formed thereon, the method including forming at least one copper pattern on a substrate, the at least one copper pattern being electrically connected with the circuit pattern on the PCB, filling a filler in on either side of the copper pattern up to a height substantially level with an upper surface of the copper pattern such that the upper surface of the copper pattern is exposed, and applying a plating layer to the upper surface of the copper pattern.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.